new lpuart config for Bluetooth RX
This commit is contained in:
@@ -23,7 +23,7 @@
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||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.116246094" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv5-d16" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1041462468" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1294249446" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.19322524" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32H723VGTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../FATFS/Target | ../FATFS/App | ../USB_DEVICE/App | ../USB_DEVICE/Target | ../Drivers/STM32H7xx_HAL_Driver/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../Middlewares/Third_Party/FatFs/src | ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../Drivers/CMSIS/Device/ST/STM32H7xx/Include | ../Drivers/CMSIS/Include || || || USE_FULL_LL_DRIVER | USE_HAL_DRIVER | STM32H723xx || || EEPROM | Drivers | Core/Startup | Middlewares | Core | FATFS | USB_DEVICE || || || ${workspace_loc:/${ProjName}/STM32H723VGTX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
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||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.19322524" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32H723VGTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../FATFS/Target | ../FATFS/App | ../USB_DEVICE/App | ../USB_DEVICE/Target | ../Drivers/STM32H7xx_HAL_Driver/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../Middlewares/Third_Party/FatFs/src | ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../Drivers/CMSIS/Device/ST/STM32H7xx/Include | ../Drivers/CMSIS/Include || || || USE_FULL_LL_DRIVER | USE_HAL_DRIVER | STM32H723xx || || Drivers | Core/Startup | Middlewares | Core | FATFS | USB_DEVICE || || || ${workspace_loc:/${ProjName}/STM32H723VGTX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
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||||
<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.784195808" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="275" valueType="string"/>
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<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.550567667" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
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<builder buildPath="${workspace_loc:/CLS_Master}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1667139540" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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@@ -85,7 +85,6 @@
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</toolChain>
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</folderInfo>
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<sourceEntries>
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<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="EEPROM"/>
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<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
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<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="FATFS"/>
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<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
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@@ -118,7 +117,7 @@
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.315263605" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv5-d16" valueType="enumerated"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.861723814" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.575901382" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.41596049" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32H723VGTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../FATFS/Target | ../FATFS/App | ../USB_DEVICE/App | ../USB_DEVICE/Target | ../Drivers/STM32H7xx_HAL_Driver/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../Middlewares/Third_Party/FatFs/src | ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../Drivers/CMSIS/Device/ST/STM32H7xx/Include | ../Drivers/CMSIS/Include || || || USE_FULL_LL_DRIVER | USE_HAL_DRIVER | STM32H723xx || || EEPROM | Drivers | Core/Startup | Middlewares | Core | FATFS | USB_DEVICE || || || ${workspace_loc:/${ProjName}/STM32H723VGTX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
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||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.41596049" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32H723VGTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../FATFS/Target | ../FATFS/App | ../USB_DEVICE/App | ../USB_DEVICE/Target | ../Drivers/STM32H7xx_HAL_Driver/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../Middlewares/Third_Party/FatFs/src | ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../Drivers/CMSIS/Device/ST/STM32H7xx/Include | ../Drivers/CMSIS/Include || || || USE_FULL_LL_DRIVER | USE_HAL_DRIVER | STM32H723xx || || Drivers | Core/Startup | Middlewares | Core | FATFS | USB_DEVICE || || || ${workspace_loc:/${ProjName}/STM32H723VGTX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
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||||
<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.669660917" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="275" valueType="string"/>
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||||
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.62262984" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
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||||
<builder buildPath="${workspace_loc:/CLS_Master}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1586300933" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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@@ -176,7 +175,6 @@
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</toolChain>
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</folderInfo>
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<sourceEntries>
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<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="EEPROM"/>
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||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
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||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="FATFS"/>
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||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
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||||
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||||
100
.mxproject
100
.mxproject
File diff suppressed because one or more lines are too long
@@ -26,6 +26,43 @@ ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
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ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
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ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
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ADC1.master=1
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Bdma.LPUART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
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Bdma.LPUART1_RX.0.EventEnable=DISABLE
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Bdma.LPUART1_RX.0.Instance=BDMA_Channel0
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Bdma.LPUART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Bdma.LPUART1_RX.0.MemInc=DMA_MINC_ENABLE
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Bdma.LPUART1_RX.0.Mode=DMA_NORMAL
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Bdma.LPUART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Bdma.LPUART1_RX.0.PeriphInc=DMA_PINC_DISABLE
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Bdma.LPUART1_RX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
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Bdma.LPUART1_RX.0.Priority=DMA_PRIORITY_LOW
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Bdma.LPUART1_RX.0.RequestNumber=1
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Bdma.LPUART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
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Bdma.LPUART1_RX.0.SignalID=NONE
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Bdma.LPUART1_RX.0.SyncEnable=DISABLE
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Bdma.LPUART1_RX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Bdma.LPUART1_RX.0.SyncRequestNumber=1
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Bdma.LPUART1_RX.0.SyncSignalID=NONE
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Bdma.LPUART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
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Bdma.LPUART1_TX.1.EventEnable=DISABLE
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Bdma.LPUART1_TX.1.Instance=BDMA_Channel1
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Bdma.LPUART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Bdma.LPUART1_TX.1.MemInc=DMA_MINC_ENABLE
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Bdma.LPUART1_TX.1.Mode=DMA_NORMAL
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Bdma.LPUART1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Bdma.LPUART1_TX.1.PeriphInc=DMA_PINC_DISABLE
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Bdma.LPUART1_TX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
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Bdma.LPUART1_TX.1.Priority=DMA_PRIORITY_LOW
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Bdma.LPUART1_TX.1.RequestNumber=1
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Bdma.LPUART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
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||||
Bdma.LPUART1_TX.1.SignalID=NONE
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||||
Bdma.LPUART1_TX.1.SyncEnable=DISABLE
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||||
Bdma.LPUART1_TX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Bdma.LPUART1_TX.1.SyncRequestNumber=1
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||||
Bdma.LPUART1_TX.1.SyncSignalID=NONE
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||||
Bdma.Request0=LPUART1_RX
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||||
Bdma.Request1=LPUART1_TX
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||||
Bdma.RequestsNb=2
|
||||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
@@ -198,36 +235,38 @@ I2C2.Timing=0x00D0D8FF
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||||
KeepUserPlacement=false
|
||||
LPTIM4.ClockPrescaler=LPTIM_PRESCALER_DIV64
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||||
LPTIM4.IPParameters=ClockPrescaler
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||||
LPUART1.BaudRate=2000000
|
||||
LPUART1.IPParameters=BaudRate
|
||||
LPUART1.BaudRate=1000000
|
||||
LPUART1.FIFOMode=UART_FIFOMODE_DISABLE
|
||||
LPUART1.IPParameters=BaudRate,FIFOMode
|
||||
Mcu.CPN=STM32H723VGT6
|
||||
Mcu.Family=STM32H7
|
||||
Mcu.IP0=ADC1
|
||||
Mcu.IP1=CORTEX_M7
|
||||
Mcu.IP10=I2C2
|
||||
Mcu.IP11=LPTIM4
|
||||
Mcu.IP12=LPUART1
|
||||
Mcu.IP13=NVIC
|
||||
Mcu.IP14=PWR
|
||||
Mcu.IP15=RCC
|
||||
Mcu.IP16=RNG
|
||||
Mcu.IP17=RTC
|
||||
Mcu.IP18=SDMMC1
|
||||
Mcu.IP19=SYS
|
||||
Mcu.IP2=CRC
|
||||
Mcu.IP20=TIM2
|
||||
Mcu.IP21=USART1
|
||||
Mcu.IP22=USART3
|
||||
Mcu.IP23=USB_DEVICE
|
||||
Mcu.IP24=USB_OTG_HS
|
||||
Mcu.IP3=DEBUG
|
||||
Mcu.IP4=DMA
|
||||
Mcu.IP5=FATFS
|
||||
Mcu.IP6=FDCAN1
|
||||
Mcu.IP7=FDCAN2
|
||||
Mcu.IP8=FREERTOS
|
||||
Mcu.IP9=I2C1
|
||||
Mcu.IPNb=25
|
||||
Mcu.IP1=BDMA
|
||||
Mcu.IP10=I2C1
|
||||
Mcu.IP11=I2C2
|
||||
Mcu.IP12=LPTIM4
|
||||
Mcu.IP13=LPUART1
|
||||
Mcu.IP14=NVIC
|
||||
Mcu.IP15=PWR
|
||||
Mcu.IP16=RCC
|
||||
Mcu.IP17=RNG
|
||||
Mcu.IP18=RTC
|
||||
Mcu.IP19=SDMMC1
|
||||
Mcu.IP2=CORTEX_M7
|
||||
Mcu.IP20=SYS
|
||||
Mcu.IP21=TIM2
|
||||
Mcu.IP22=USART1
|
||||
Mcu.IP23=USART3
|
||||
Mcu.IP24=USB_DEVICE
|
||||
Mcu.IP25=USB_OTG_HS
|
||||
Mcu.IP3=CRC
|
||||
Mcu.IP4=DEBUG
|
||||
Mcu.IP5=DMA
|
||||
Mcu.IP6=FATFS
|
||||
Mcu.IP7=FDCAN1
|
||||
Mcu.IP8=FDCAN2
|
||||
Mcu.IP9=FREERTOS
|
||||
Mcu.IPNb=26
|
||||
Mcu.Name=STM32H723VGTx
|
||||
Mcu.Package=LQFP100
|
||||
Mcu.Pin0=PE2
|
||||
@@ -302,6 +341,8 @@ Mcu.UserName=STM32H723VGTx
|
||||
MxCube.Version=6.9.2
|
||||
MxDb.Version=DB.6.0.92
|
||||
NVIC.ADC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.BDMA_Channel0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.BDMA_Channel1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
@@ -540,7 +581,7 @@ ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-LL-true,7-MX_USART3_UART_Init-USART3-false-LL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_FDCAN1_Init-FDCAN1-false-HAL-true,13-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,14-MX_FDCAN2_Init-FDCAN2-false-HAL-true,15-MX_I2C1_Init-I2C1-false-HAL-true,16-MX_CRC_Init-CRC-false-HAL-true,17-MX_RNG_Init-RNG-false-HAL-true,18-MX_TIM2_Init-TIM2-false-HAL-true,19-MX_LPTIM4_Init-LPTIM4-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,0-MX_VREFBUF_Init-VREFBUF-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_BDMA_Init-BDMA-false-HAL-true,5-MX_I2C2_Init-I2C2-false-HAL-true,6-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-LL-true,8-MX_USART3_UART_Init-USART3-false-LL-true,9-MX_RTC_Init-RTC-false-HAL-true,10-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,11-MX_FATFS_Init-FATFS-false-HAL-false,12-MX_ADC1_Init-ADC1-false-HAL-true,13-MX_FDCAN1_Init-FDCAN1-false-HAL-true,14-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,15-MX_FDCAN2_Init-FDCAN2-false-HAL-true,16-MX_I2C1_Init-I2C1-false-HAL-true,17-MX_CRC_Init-CRC-false-HAL-true,18-MX_RNG_Init-RNG-false-HAL-true,19-MX_LPTIM4_Init-LPTIM4-false-HAL-true,20-MX_TIM2_Init-TIM2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
|
||||
RCC.ADCFreq_Value=96000000
|
||||
RCC.AHB12Freq_Value=275000000
|
||||
RCC.AHB4Freq_Value=275000000
|
||||
|
||||
52
Core/Inc/bdma.h
Normal file
52
Core/Inc/bdma.h
Normal file
@@ -0,0 +1,52 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file bdma.h
|
||||
* @brief This file contains all the function prototypes for
|
||||
* the bdma.c file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __BDMA_H__
|
||||
#define __BDMA_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* DMA memory to memory transfer handles -------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
void MX_BDMA_Init(void);
|
||||
|
||||
/* USER CODE BEGIN Prototypes */
|
||||
|
||||
/* USER CODE END Prototypes */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BDMA_H__ */
|
||||
|
||||
@@ -72,6 +72,8 @@ void SDMMC1_IRQHandler(void);
|
||||
void OTG_HS_EP1_OUT_IRQHandler(void);
|
||||
void OTG_HS_EP1_IN_IRQHandler(void);
|
||||
void OTG_HS_IRQHandler(void);
|
||||
void BDMA_Channel0_IRQHandler(void);
|
||||
void BDMA_Channel1_IRQHandler(void);
|
||||
void LPTIM4_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
|
||||
58
Core/Src/bdma.c
Normal file
58
Core/Src/bdma.c
Normal file
@@ -0,0 +1,58 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file bdma.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of all the requested memory to memory DMA transfers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "bdma.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* Configure DMA */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/**
|
||||
* Enable DMA controller clock
|
||||
*/
|
||||
void MX_BDMA_Init(void)
|
||||
{
|
||||
|
||||
/* DMA controller clock enable */
|
||||
__HAL_RCC_BDMA_CLK_ENABLE();
|
||||
|
||||
/* DMA interrupt init */
|
||||
/* BDMA_Channel0_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn);
|
||||
/* BDMA_Channel1_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(BDMA_Channel1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(BDMA_Channel1_IRQn);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
@@ -20,6 +20,7 @@
|
||||
#include "main.h"
|
||||
#include "cmsis_os.h"
|
||||
#include "adc.h"
|
||||
#include "bdma.h"
|
||||
#include "crc.h"
|
||||
#include "dma.h"
|
||||
#include "fatfs.h"
|
||||
@@ -46,7 +47,8 @@
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
uint8_t lp_buffer[2][1024] = {0};
|
||||
uint8_t swap_index = 0;
|
||||
/* USER CODE END PTD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
@@ -61,7 +63,6 @@
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
// define the magic number for the bootloader 8 bytes
|
||||
/* USER CODE BEGIN PV */
|
||||
uint8_t gCLS_DEVICE_ADDRESS = 0x11;
|
||||
/* USER CODE END PV */
|
||||
@@ -121,6 +122,7 @@ int main(void)
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_DMA_Init();
|
||||
MX_BDMA_Init();
|
||||
MX_I2C2_Init();
|
||||
MX_LPUART1_UART_Init();
|
||||
MX_USART1_UART_Init();
|
||||
@@ -133,19 +135,21 @@ int main(void)
|
||||
MX_I2C1_Init();
|
||||
MX_CRC_Init();
|
||||
MX_RNG_Init();
|
||||
MX_TIM2_Init();
|
||||
MX_LPTIM4_Init();
|
||||
MX_TIM2_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
BSP_GPIO_PeriperalsOn();
|
||||
BSP_POWER_Init();
|
||||
ULOG_INIT();
|
||||
ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL);
|
||||
//ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL);
|
||||
ULOG_DEBUG("Setup Logger");
|
||||
gCLS_DEVICE_ADDRESS = 0x11; // Address is set to master
|
||||
ULOG_DEBUG("Setting Global CLS address to 0b10001");
|
||||
ULOG_DEBUG("Init Kernel and start schedule");
|
||||
|
||||
HAL_UART_Receive_DMA(&hlpuart1, lp_buffer[0], 1024);
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Init scheduler */
|
||||
|
||||
@@ -63,6 +63,8 @@ extern ADC_HandleTypeDef hadc1;
|
||||
extern FDCAN_HandleTypeDef hfdcan1;
|
||||
extern FDCAN_HandleTypeDef hfdcan2;
|
||||
extern LPTIM_HandleTypeDef hlptim4;
|
||||
extern DMA_HandleTypeDef hdma_lpuart1_rx;
|
||||
extern DMA_HandleTypeDef hdma_lpuart1_tx;
|
||||
extern RTC_HandleTypeDef hrtc;
|
||||
extern SD_HandleTypeDef hsd1;
|
||||
extern TIM_HandleTypeDef htim2;
|
||||
@@ -475,6 +477,34 @@ void OTG_HS_IRQHandler(void)
|
||||
/* USER CODE END OTG_HS_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles BDMA channel0 global interrupt.
|
||||
*/
|
||||
void BDMA_Channel0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BDMA_Channel0_IRQn 0 */
|
||||
|
||||
/* USER CODE END BDMA_Channel0_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_lpuart1_rx);
|
||||
/* USER CODE BEGIN BDMA_Channel0_IRQn 1 */
|
||||
|
||||
/* USER CODE END BDMA_Channel0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles BDMA channel1 global interrupt.
|
||||
*/
|
||||
void BDMA_Channel1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BDMA_Channel1_IRQn 0 */
|
||||
|
||||
/* USER CODE END BDMA_Channel1_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
|
||||
/* USER CODE BEGIN BDMA_Channel1_IRQn 1 */
|
||||
|
||||
/* USER CODE END BDMA_Channel1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles LPTIM4 global interrupt.
|
||||
*/
|
||||
|
||||
@@ -25,6 +25,8 @@
|
||||
/* USER CODE END 0 */
|
||||
|
||||
UART_HandleTypeDef hlpuart1;
|
||||
DMA_HandleTypeDef hdma_lpuart1_rx;
|
||||
DMA_HandleTypeDef hdma_lpuart1_tx;
|
||||
|
||||
/* LPUART1 init function */
|
||||
|
||||
@@ -39,7 +41,7 @@ void MX_LPUART1_UART_Init(void)
|
||||
|
||||
/* USER CODE END LPUART1_Init 1 */
|
||||
hlpuart1.Instance = LPUART1;
|
||||
hlpuart1.Init.BaudRate = 2000000;
|
||||
hlpuart1.Init.BaudRate = 1000000;
|
||||
hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
hlpuart1.Init.StopBits = UART_STOPBITS_1;
|
||||
hlpuart1.Init.Parity = UART_PARITY_NONE;
|
||||
@@ -340,6 +342,41 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
||||
GPIO_InitStruct.Alternate = GPIO_AF8_LPUART;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* LPUART1 DMA Init */
|
||||
/* LPUART1_RX Init */
|
||||
hdma_lpuart1_rx.Instance = BDMA_Channel0;
|
||||
hdma_lpuart1_rx.Init.Request = BDMA_REQUEST_LPUART1_RX;
|
||||
hdma_lpuart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_lpuart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_lpuart1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_lpuart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_lpuart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_lpuart1_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_lpuart1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_lpuart1_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_lpuart1_rx);
|
||||
|
||||
/* LPUART1_TX Init */
|
||||
hdma_lpuart1_tx.Instance = BDMA_Channel1;
|
||||
hdma_lpuart1_tx.Init.Request = BDMA_REQUEST_LPUART1_TX;
|
||||
hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_lpuart1_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_lpuart1_tx);
|
||||
|
||||
/* USER CODE BEGIN LPUART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END LPUART1_MspInit 1 */
|
||||
@@ -365,6 +402,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
|
||||
|
||||
/* LPUART1 DMA DeInit */
|
||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||
HAL_DMA_DeInit(uartHandle->hdmatx);
|
||||
/* USER CODE BEGIN LPUART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END LPUART1_MspDeInit 1 */
|
||||
|
||||
Reference in New Issue
Block a user