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new lpuart config for Bluetooth RX

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This commit is contained in:
Oliver Walter
2024-08-06 00:05:05 +02:00
parent 8c209ac6aa
commit 8e3b1526aa
9 changed files with 313 additions and 86 deletions
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52
Core/Inc/bdma.h Normal file
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@@ -0,0 +1,52 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file bdma.h
* @brief This file contains all the function prototypes for
* the bdma.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __BDMA_H__
#define __BDMA_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* DMA memory to memory transfer handles -------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_BDMA_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __BDMA_H__ */

2
Core/Inc/stm32h7xx_it.h
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@@ -72,6 +72,8 @@ void SDMMC1_IRQHandler(void);
void OTG_HS_EP1_OUT_IRQHandler(void);
void OTG_HS_EP1_IN_IRQHandler(void);
void OTG_HS_IRQHandler(void);
void BDMA_Channel0_IRQHandler(void);
void BDMA_Channel1_IRQHandler(void);
void LPTIM4_IRQHandler(void);
/* USER CODE BEGIN EFP */

58
Core/Src/bdma.c Normal file
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@@ -0,0 +1,58 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file bdma.c
* @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "bdma.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure DMA */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/**
* Enable DMA controller clock
*/
void MX_BDMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_BDMA_CLK_ENABLE();
/* DMA interrupt init */
/* BDMA_Channel0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn);
/* BDMA_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(BDMA_Channel1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(BDMA_Channel1_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */

12
Core/Src/main.c
View File

@@ -20,6 +20,7 @@
#include "main.h"
#include "cmsis_os.h"
#include "adc.h"
#include "bdma.h"
#include "crc.h"
#include "dma.h"
#include "fatfs.h"
@@ -46,7 +47,8 @@
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
uint8_t lp_buffer[2][1024] = {0};
uint8_t swap_index = 0;
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
@@ -61,7 +63,6 @@
/* Private variables ---------------------------------------------------------*/
// define the magic number for the bootloader 8 bytes
/* USER CODE BEGIN PV */
uint8_t gCLS_DEVICE_ADDRESS = 0x11;
/* USER CODE END PV */
@@ -121,6 +122,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_BDMA_Init();
MX_I2C2_Init();
MX_LPUART1_UART_Init();
MX_USART1_UART_Init();
@@ -133,19 +135,21 @@ int main(void)
MX_I2C1_Init();
MX_CRC_Init();
MX_RNG_Init();
MX_TIM2_Init();
MX_LPTIM4_Init();
MX_TIM2_Init();
/* USER CODE BEGIN 2 */
BSP_GPIO_PeriperalsOn();
BSP_POWER_Init();
ULOG_INIT();
ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL);
//ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL);
ULOG_DEBUG("Setup Logger");
gCLS_DEVICE_ADDRESS = 0x11; // Address is set to master
ULOG_DEBUG("Setting Global CLS address to 0b10001");
ULOG_DEBUG("Init Kernel and start schedule");
HAL_UART_Receive_DMA(&hlpuart1, lp_buffer[0], 1024);
/* USER CODE END 2 */
/* Init scheduler */

30
Core/Src/stm32h7xx_it.c
View File

@@ -63,6 +63,8 @@ extern ADC_HandleTypeDef hadc1;
extern FDCAN_HandleTypeDef hfdcan1;
extern FDCAN_HandleTypeDef hfdcan2;
extern LPTIM_HandleTypeDef hlptim4;
extern DMA_HandleTypeDef hdma_lpuart1_rx;
extern DMA_HandleTypeDef hdma_lpuart1_tx;
extern RTC_HandleTypeDef hrtc;
extern SD_HandleTypeDef hsd1;
extern TIM_HandleTypeDef htim2;
@@ -475,6 +477,34 @@ void OTG_HS_IRQHandler(void)
/* USER CODE END OTG_HS_IRQn 1 */
}
/**
* @brief This function handles BDMA channel0 global interrupt.
*/
void BDMA_Channel0_IRQHandler(void)
{
/* USER CODE BEGIN BDMA_Channel0_IRQn 0 */
/* USER CODE END BDMA_Channel0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_lpuart1_rx);
/* USER CODE BEGIN BDMA_Channel0_IRQn 1 */
/* USER CODE END BDMA_Channel0_IRQn 1 */
}
/**
* @brief This function handles BDMA channel1 global interrupt.
*/
void BDMA_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN BDMA_Channel1_IRQn 0 */
/* USER CODE END BDMA_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
/* USER CODE BEGIN BDMA_Channel1_IRQn 1 */
/* USER CODE END BDMA_Channel1_IRQn 1 */
}
/**
* @brief This function handles LPTIM4 global interrupt.
*/

42
Core/Src/usart.c
View File

@@ -25,6 +25,8 @@
/* USER CODE END 0 */
UART_HandleTypeDef hlpuart1;
DMA_HandleTypeDef hdma_lpuart1_rx;
DMA_HandleTypeDef hdma_lpuart1_tx;
/* LPUART1 init function */
@@ -39,7 +41,7 @@ void MX_LPUART1_UART_Init(void)
/* USER CODE END LPUART1_Init 1 */
hlpuart1.Instance = LPUART1;
hlpuart1.Init.BaudRate = 2000000;
hlpuart1.Init.BaudRate = 1000000;
hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
hlpuart1.Init.StopBits = UART_STOPBITS_1;
hlpuart1.Init.Parity = UART_PARITY_NONE;
@@ -340,6 +342,41 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Alternate = GPIO_AF8_LPUART;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* LPUART1 DMA Init */
/* LPUART1_RX Init */
hdma_lpuart1_rx.Instance = BDMA_Channel0;
hdma_lpuart1_rx.Init.Request = BDMA_REQUEST_LPUART1_RX;
hdma_lpuart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_lpuart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_lpuart1_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_lpuart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_lpuart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_lpuart1_rx.Init.Mode = DMA_NORMAL;
hdma_lpuart1_rx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_lpuart1_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_lpuart1_rx);
/* LPUART1_TX Init */
hdma_lpuart1_tx.Instance = BDMA_Channel1;
hdma_lpuart1_tx.Init.Request = BDMA_REQUEST_LPUART1_TX;
hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_lpuart1_tx.Init.Mode = DMA_NORMAL;
hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_lpuart1_tx);
/* USER CODE BEGIN LPUART1_MspInit 1 */
/* USER CODE END LPUART1_MspInit 1 */
@@ -365,6 +402,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
/* LPUART1 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USER CODE BEGIN LPUART1_MspDeInit 1 */
/* USER CODE END LPUART1_MspDeInit 1 */