From b02f4af38d181bff97129daf5158059588b04726 Mon Sep 17 00:00:00 2001 From: Oliver Walter Date: Sat, 10 Aug 2024 03:28:37 +0200 Subject: [PATCH] using LPUART to forward Bluetooth messages ! --- CLS_Master.ioc | 1 + Core/Inc/stm32h7xx_it.h | 1 + Core/Src/main.c | 45 +++++++++++++++++++++++++-- Core/Src/stm32h7xx_it.c | 17 ++++++++++ Core/Src/usart.c | 8 ++++- STM32H723VGTX_FLASH.ld | 11 +++++++ cmake_generated/cmake_generated.cmake | 1 + lib/TinyFrameConf/TF_Config.h | 2 +- tools/uart_in_test.py | 13 ++++++++ 9 files changed, 94 insertions(+), 5 deletions(-) create mode 100644 tools/uart_in_test.py diff --git a/CLS_Master.ioc b/CLS_Master.ioc index 5c90b30..3bc0142 100644 --- a/CLS_Master.ioc +++ b/CLS_Master.ioc @@ -358,6 +358,7 @@ NVIC.FDCAN2_IT1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.LPTIM4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.LPUART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.OTG_HS_EP1_IN_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true diff --git a/Core/Inc/stm32h7xx_it.h b/Core/Inc/stm32h7xx_it.h index 0846a14..9d84781 100644 --- a/Core/Inc/stm32h7xx_it.h +++ b/Core/Inc/stm32h7xx_it.h @@ -75,6 +75,7 @@ void OTG_HS_IRQHandler(void); void BDMA_Channel0_IRQHandler(void); void BDMA_Channel1_IRQHandler(void); void LPTIM4_IRQHandler(void); +void LPUART1_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/Core/Src/main.c b/Core/Src/main.c index b4a5735..3b13ee6 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -43,11 +43,13 @@ #include "BSP_GPIO.h" #include "BSP_ADC.h" #include "ram_loader.h" +#include "AsyncComm.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN PTD */ -uint8_t lp_buffer[2][1024] = {0}; +extern uart_desc_t uart_half; +__attribute__((__section__(".dma_buffer"))) uint8_t lp_buffer[2][2048] = {0}; uint8_t swap_index = 0; /* USER CODE END PTD */ @@ -142,13 +144,19 @@ int main(void) BSP_GPIO_PeriperalsOn(); BSP_POWER_Init(); ULOG_INIT(); - //ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL); + ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL); ULOG_DEBUG("Setup Logger"); gCLS_DEVICE_ADDRESS = 0x11; // Address is set to master ULOG_DEBUG("Setting Global CLS address to 0b10001"); ULOG_DEBUG("Init Kernel and start schedule"); + + //HAL_UART_Receive(&hlpuart1, lp_buffer[swap_index], 10, 10000); - HAL_UART_Receive_DMA(&hlpuart1, lp_buffer[0], 1024); + HAL_StatusTypeDef status = HAL_UARTEx_ReceiveToIdle_DMA(&hlpuart1, lp_buffer[swap_index], 2048); + if(status != HAL_OK){ + ULOG_ERROR("Failed to start DMA"); + Error_Handler(); + } /* USER CODE END 2 */ @@ -172,6 +180,37 @@ int main(void) /* USER CODE END 3 */ } +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart){ + if(huart->Instance ==LPUART1){ + uint8_t new_index = (swap_index + 1) % 2; + HAL_UARTEx_ReceiveToIdle_DMA(&hlpuart1, lp_buffer[new_index], 2048); + usart_send_data(&uart_half, lp_buffer[swap_index], 2048); + swap_index = new_index; + } +} + +void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size){ + //restarts the DMA listening of the UART rx (next 247 bytes) + if(huart->Instance ==LPUART1){ + + uint8_t new_index = (swap_index + 1) % 2; + HAL_UARTEx_ReceiveToIdle_DMA(&hlpuart1, lp_buffer[new_index], 2048); + usart_send_data(&uart_half, lp_buffer[swap_index], Size); + swap_index = new_index; + } + return; +} + + +void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + if(huart->Instance ==LPUART1){ + swap_index = (swap_index + 1) % 2; + HAL_UARTEx_ReceiveToIdle_DMA(&hlpuart1, lp_buffer[swap_index], 2048); + } +} + /** * @brief System Clock Configuration * @retval None diff --git a/Core/Src/stm32h7xx_it.c b/Core/Src/stm32h7xx_it.c index b20abce..9f018d9 100644 --- a/Core/Src/stm32h7xx_it.c +++ b/Core/Src/stm32h7xx_it.c @@ -65,6 +65,7 @@ extern FDCAN_HandleTypeDef hfdcan2; extern LPTIM_HandleTypeDef hlptim4; extern DMA_HandleTypeDef hdma_lpuart1_rx; extern DMA_HandleTypeDef hdma_lpuart1_tx; +extern UART_HandleTypeDef hlpuart1; extern RTC_HandleTypeDef hrtc; extern SD_HandleTypeDef hsd1; extern TIM_HandleTypeDef htim2; @@ -519,6 +520,22 @@ void LPTIM4_IRQHandler(void) /* USER CODE END LPTIM4_IRQn 1 */ } +/** + * @brief This function handles LPUART1 global interrupt. + */ +void LPUART1_IRQHandler(void) +{ + /* USER CODE BEGIN LPUART1_IRQn 0 */ + + /* USER CODE END LPUART1_IRQn 0 */ + HAL_UART_IRQHandler(&hlpuart1); + /* USER CODE BEGIN LPUART1_IRQn 1 */ + + + + /* USER CODE END LPUART1_IRQn 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Core/Src/usart.c b/Core/Src/usart.c index 6870e22..bab758a 100644 --- a/Core/Src/usart.c +++ b/Core/Src/usart.c @@ -41,7 +41,7 @@ void MX_LPUART1_UART_Init(void) /* USER CODE END LPUART1_Init 1 */ hlpuart1.Instance = LPUART1; - hlpuart1.Init.BaudRate = 1000000; + hlpuart1.Init.BaudRate = 3000000; hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; hlpuart1.Init.StopBits = UART_STOPBITS_1; hlpuart1.Init.Parity = UART_PARITY_NONE; @@ -377,6 +377,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) __HAL_LINKDMA(uartHandle,hdmatx,hdma_lpuart1_tx); + /* LPUART1 interrupt Init */ + HAL_NVIC_SetPriority(LPUART1_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(LPUART1_IRQn); /* USER CODE BEGIN LPUART1_MspInit 1 */ /* USER CODE END LPUART1_MspInit 1 */ @@ -405,6 +408,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) /* LPUART1 DMA DeInit */ HAL_DMA_DeInit(uartHandle->hdmarx); HAL_DMA_DeInit(uartHandle->hdmatx); + + /* LPUART1 interrupt Deinit */ + HAL_NVIC_DisableIRQ(LPUART1_IRQn); /* USER CODE BEGIN LPUART1_MspDeInit 1 */ /* USER CODE END LPUART1_MspDeInit 1 */ diff --git a/STM32H723VGTX_FLASH.ld b/STM32H723VGTX_FLASH.ld index 1baeedf..f2b9213 100644 --- a/STM32H723VGTX_FLASH.ld +++ b/STM32H723VGTX_FLASH.ld @@ -171,6 +171,17 @@ SECTIONS . = ALIGN(8); } >RAM_D1 + + .dma_buffer : + { + /*_framebuffer =.; */ + /*__framebuffer_start__ = _framebuffer; */ + *(.dma_buffer) + *(.dma_buffer*) + + } >RAM_D3 + + /* Remove information from the standard libraries */ /DISCARD/ : { diff --git a/cmake_generated/cmake_generated.cmake b/cmake_generated/cmake_generated.cmake index c5480be..4b75d9f 100644 --- a/cmake_generated/cmake_generated.cmake +++ b/cmake_generated/cmake_generated.cmake @@ -22,6 +22,7 @@ set(sources_SRCS ${sources_SRCS} ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/adc.c ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/crc.c ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/dma.c + ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/bdma.c ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/fdcan.c ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/gpio.c ${CMAKE_CURRENT_SOURCE_DIR}/Core/Src/i2c.c diff --git a/lib/TinyFrameConf/TF_Config.h b/lib/TinyFrameConf/TF_Config.h index 1f84b06..d4be289 100644 --- a/lib/TinyFrameConf/TF_Config.h +++ b/lib/TinyFrameConf/TF_Config.h @@ -38,7 +38,7 @@ // Use a SOF byte to mark the start of a frame #define TF_USE_SOF_BYTE 1 // Value of the SOF byte (if TF_USE_SOF_BYTE == 1) -#define TF_SOF_BYTE 0x01 +#define TF_SOF_BYTE 0x55 //----------------------- PLATFORM COMPATIBILITY ---------------------------- diff --git a/tools/uart_in_test.py b/tools/uart_in_test.py new file mode 100644 index 0000000..fb06449 --- /dev/null +++ b/tools/uart_in_test.py @@ -0,0 +1,13 @@ +import serial + +# Open the serial port +ser = serial.Serial('/dev/ttyACM1', baudrate=1000000) + +# Send 10 bytes of data +data = b'01234567890123456789012345678901234567890123456789' + +for i in range(10): + ser.write(data) + +# Close the serial port +ser.close() \ No newline at end of file