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configure LPTIM4 for BSP_POWER

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This commit is contained in:
Oliver Walter
2024-02-24 20:08:01 +01:00
parent b6307ce2fe
commit a484f2247e
10 changed files with 3600 additions and 58 deletions
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52
Core/Inc/lptim.h Normal file
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@@ -0,0 +1,52 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file lptim.h
* @brief This file contains all the function prototypes for
* the lptim.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __LPTIM_H__
#define __LPTIM_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern LPTIM_HandleTypeDef hlptim4;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_LPTIM4_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __LPTIM_H__ */

2
Core/Inc/stm32h7xx_hal_conf.h
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@@ -63,7 +63,7 @@
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_LPTIM_MODULE_ENABLED
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_RAMECC_MODULE_ENABLED */

1
Core/Inc/stm32h7xx_it.h
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@@ -70,6 +70,7 @@ void SDMMC1_IRQHandler(void);
void OTG_HS_EP1_OUT_IRQHandler(void);
void OTG_HS_EP1_IN_IRQHandler(void);
void OTG_HS_IRQHandler(void);
void LPTIM4_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

109
Core/Src/lptim.c Normal file
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@@ -0,0 +1,109 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file lptim.c
* @brief This file provides code for the configuration
* of the LPTIM instances.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "lptim.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
LPTIM_HandleTypeDef hlptim4;
/* LPTIM4 init function */
void MX_LPTIM4_Init(void)
{
/* USER CODE BEGIN LPTIM4_Init 0 */
/* USER CODE END LPTIM4_Init 0 */
/* USER CODE BEGIN LPTIM4_Init 1 */
/* USER CODE END LPTIM4_Init 1 */
hlptim4.Instance = LPTIM4;
hlptim4.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim4.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV2;
hlptim4.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim4.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim4.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim4.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM4_Init 2 */
/* USER CODE END LPTIM4_Init 2 */
}
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* lptimHandle)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(lptimHandle->Instance==LPTIM4)
{
/* USER CODE BEGIN LPTIM4_MspInit 0 */
/* USER CODE END LPTIM4_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM4;
PeriphClkInitStruct.Lptim345ClockSelection = RCC_LPTIM345CLKSOURCE_LSI;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* LPTIM4 clock enable */
__HAL_RCC_LPTIM4_CLK_ENABLE();
/* LPTIM4 interrupt Init */
HAL_NVIC_SetPriority(LPTIM4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(LPTIM4_IRQn);
/* USER CODE BEGIN LPTIM4_MspInit 1 */
/* USER CODE END LPTIM4_MspInit 1 */
}
}
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* lptimHandle)
{
if(lptimHandle->Instance==LPTIM4)
{
/* USER CODE BEGIN LPTIM4_MspDeInit 0 */
/* USER CODE END LPTIM4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM4_CLK_DISABLE();
/* LPTIM4 interrupt Deinit */
HAL_NVIC_DisableIRQ(LPTIM4_IRQn);
/* USER CODE BEGIN LPTIM4_MspDeInit 1 */
/* USER CODE END LPTIM4_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

2
Core/Src/main.c
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@@ -25,6 +25,7 @@
#include "fatfs.h"
#include "fdcan.h"
#include "i2c.h"
#include "lptim.h"
#include "usart.h"
#include "rng.h"
#include "rtc.h"
@@ -126,6 +127,7 @@ int main(void)
MX_CRC_Init();
MX_RNG_Init();
MX_TIM2_Init();
MX_LPTIM4_Init();
/* USER CODE BEGIN 2 */
ULOG_INIT();
ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL);

15
Core/Src/stm32h7xx_it.c
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@@ -58,6 +58,7 @@
extern PCD_HandleTypeDef hpcd_USB_OTG_HS;
extern FDCAN_HandleTypeDef hfdcan1;
extern FDCAN_HandleTypeDef hfdcan2;
extern LPTIM_HandleTypeDef hlptim4;
extern RTC_HandleTypeDef hrtc;
extern SD_HandleTypeDef hsd1;
extern TIM_HandleTypeDef htim2;
@@ -415,6 +416,20 @@ void OTG_HS_IRQHandler(void)
/* USER CODE END OTG_HS_IRQn 1 */
}
/**
* @brief This function handles LPTIM4 global interrupt.
*/
void LPTIM4_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM4_IRQn 0 */
/* USER CODE END LPTIM4_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim4);
/* USER CODE BEGIN LPTIM4_IRQn 1 */
/* USER CODE END LPTIM4_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */