diff --git a/.vscode/settings.json b/.vscode/settings.json
new file mode 100644
index 0000000..66078bc
--- /dev/null
+++ b/.vscode/settings.json
@@ -0,0 +1,5 @@
+{
+    "files.associations": {
+        "bsp_adc.h": "c"
+    }
+}
\ No newline at end of file
diff --git a/Application/BSP/BSP_ADC.c b/Application/BSP/BSP_ADC.c
new file mode 100644
index 0000000..0d5ac5f
--- /dev/null
+++ b/Application/BSP/BSP_ADC.c
@@ -0,0 +1,56 @@
+#include "main.h"
+#include "BSP_ADC.h"
+#include "adc.h"
+#include "stdbool.h"
+
+#define ADC_CONVERTED_DATA_BUFFER_SIZE   ((uint32_t) 16)   /* Size of array aADCxConvertedData[] */
+ALIGN_32BYTES (static uint16_t   aADCxConvertedData[ADC_CONVERTED_DATA_BUFFER_SIZE]);
+
+
+static bool adcIsInitialized = false;
+
+//start the ADC conversion
+void BSP_ADC_Start()
+{
+
+
+  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+
+  if (HAL_ADC_Start_DMA(&hadc1,
+                        (uint32_t *)aADCxConvertedData,
+                        ADC_CONVERTED_DATA_BUFFER_SIZE
+                       ) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  
+    adcIsInitialized = true;
+
+}
+
+
+/**
+  * @brief  Conversion complete callback in non-blocking mode
+  * @param  hadc: ADC handle
+  * @retval None
+  */
+void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
+{
+  /* Invalidate Data Cache to get the updated content of the SRAM on the first half of the ADC converted data buffer: 32 bytes */
+  SCB_InvalidateDCache_by_Addr((uint32_t *) &aADCxConvertedData[0], ADC_CONVERTED_DATA_BUFFER_SIZE);
+}
+
+/**
+  * @brief  Conversion DMA half-transfer callback in non-blocking mode
+  * @param  hadc: ADC handle
+  * @retval None
+  */
+void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
+{
+   /* Invalidate Data Cache to get the updated content of the SRAM on the second half of the ADC converted data buffer: 32 bytes */
+  SCB_InvalidateDCache_by_Addr((uint32_t *) &aADCxConvertedData[ADC_CONVERTED_DATA_BUFFER_SIZE/2], ADC_CONVERTED_DATA_BUFFER_SIZE);
+}
\ No newline at end of file
diff --git a/Application/BSP/BSP_ADC.h b/Application/BSP/BSP_ADC.h
new file mode 100644
index 0000000..06b54b2
--- /dev/null
+++ b/Application/BSP/BSP_ADC.h
@@ -0,0 +1,10 @@
+
+
+void BSP_ADC_Start();
+
+
+float BSP_ADC_ReadDimmerValue();
+
+
+
+float BSP_ADC_ReadBusValue();
diff --git a/Application/BSP/BSP_POWER.c b/Application/BSP/BSP_POWER.c
index ef5e6a8..0efd64f 100644
--- a/Application/BSP/BSP_POWER.c
+++ b/Application/BSP/BSP_POWER.c
@@ -9,6 +9,7 @@
 #include "sdmmc.h"
 #include "cmsis_os2.h"
 #include "BSP_GPIO.h"
+#include "BSP_ADC.h"
 
 #define LPTIM_CLK 500     // Hz
 #define SLEEP_TICK_TIME 1  // seconds to wait
@@ -126,4 +127,14 @@ void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim) {
         }
     }
 
-}
\ No newline at end of file
+}
+
+
+
+void BSP_POWER_FullPowerMode() {
+
+    BSP_GPIO_ClsOn();
+    BSP_GPIO_PeriperalsOn();
+    BSP_ADC_Start();
+
+}
diff --git a/Application/BSP/BSP_POWER.h b/Application/BSP/BSP_POWER.h
index 6861a0f..42a3731 100644
--- a/Application/BSP/BSP_POWER.h
+++ b/Application/BSP/BSP_POWER.h
@@ -10,4 +10,7 @@ void BSP_POWER_Init();
 void BSP_POWER_WakeUp();
 
 
-void BSP_POWER_EnterStandby();
\ No newline at end of file
+void BSP_POWER_EnterStandby();
+
+
+void BSP_POWER_FullPowerMode();
\ No newline at end of file
diff --git a/Application/BSP/CMakeLists.txt b/Application/BSP/CMakeLists.txt
index ed7b7e5..983e9f0 100644
--- a/Application/BSP/CMakeLists.txt
+++ b/Application/BSP/CMakeLists.txt
@@ -4,6 +4,7 @@ BSP_EE24.c
 BSP_INA.c
 BSP_POWER.c
 BSP_GPIO.c
+BSP_ADC.c
 )
 
 target_include_directories(BSP PUBLIC ./)
diff --git a/CLS_Master.ioc b/CLS_Master.ioc
index fd53cad..152cfc6 100644
--- a/CLS_Master.ioc
+++ b/CLS_Master.ioc
@@ -1,24 +1,30 @@
 #MicroXplorer Configuration settings - do not modify
-ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_9
-ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_5
-ADC1.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_5
+ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_5
+ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_8
+ADC1.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_9
+ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_19
 ADC1.ContinuousConvMode=ENABLE
+ADC1.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_CIRCULAR
 ADC1.EOCSelection=ADC_EOC_SEQ_CONV
-ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,NbrOfConversionFlag,master,ContinuousConvMode,EOCSelection,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSignedSaturation-3\#ChannelRegularConversion,NbrOfConversion
-ADC1.NbrOfConversion=3
+ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,NbrOfConversionFlag,master,ContinuousConvMode,EOCSelection,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSignedSaturation-3\#ChannelRegularConversion,NbrOfConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,OffsetSignedSaturation-4\#ChannelRegularConversion,ConversionDataManagement
+ADC1.NbrOfConversion=4
 ADC1.NbrOfConversionFlag=1
 ADC1.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
 ADC1.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
 ADC1.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE
 ADC1.OffsetSignedSaturation-1\#ChannelRegularConversion=DISABLE
 ADC1.OffsetSignedSaturation-2\#ChannelRegularConversion=DISABLE
 ADC1.OffsetSignedSaturation-3\#ChannelRegularConversion=DISABLE
+ADC1.OffsetSignedSaturation-4\#ChannelRegularConversion=DISABLE
 ADC1.Rank-1\#ChannelRegularConversion=1
 ADC1.Rank-2\#ChannelRegularConversion=2
 ADC1.Rank-3\#ChannelRegularConversion=3
-ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
-ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
-ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
+ADC1.Rank-4\#ChannelRegularConversion=4
+ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
+ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
+ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
+ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_32CYCLES_5
 ADC1.master=1
 CAD.formats=
 CAD.pinconfig=
@@ -27,11 +33,30 @@ CORTEX_M7.CPU_DCache=Disabled
 CORTEX_M7.CPU_ICache=Enabled
 CORTEX_M7.IPParameters=default_mode_Activation,CPU_ICache,CPU_DCache
 CORTEX_M7.default_mode_Activation=1
+Dma.ADC1.4.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.4.EventEnable=DISABLE
+Dma.ADC1.4.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.ADC1.4.Instance=DMA1_Stream4
+Dma.ADC1.4.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.4.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.4.Mode=DMA_CIRCULAR
+Dma.ADC1.4.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.4.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.4.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.4.Priority=DMA_PRIORITY_LOW
+Dma.ADC1.4.RequestNumber=1
+Dma.ADC1.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.4.SignalID=NONE
+Dma.ADC1.4.SyncEnable=DISABLE
+Dma.ADC1.4.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.4.SyncRequestNumber=1
+Dma.ADC1.4.SyncSignalID=NONE
 Dma.Request0=USART1_RX
 Dma.Request1=USART1_TX
 Dma.Request2=USART3_RX
 Dma.Request3=USART3_TX
-Dma.RequestsNb=4
+Dma.Request4=ADC1
+Dma.RequestsNb=5
 Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
 Dma.USART1_RX.0.EventEnable=DISABLE
 Dma.USART1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
@@ -278,11 +303,13 @@ Mcu.UserConstants=
 Mcu.UserName=STM32H723VGTx
 MxCube.Version=6.9.2
 MxDb.Version=DB.6.0.92
+NVIC.ADC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.EXTI3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
 NVIC.FDCAN1_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
@@ -515,7 +542,7 @@ ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-LL-true,7-MX_USART3_UART_Init-USART3-false-LL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_FDCAN1_Init-FDCAN1-false-HAL-true,13-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,14-MX_FDCAN2_Init-FDCAN2-false-HAL-true,15-MX_I2C1_Init-I2C1-false-HAL-true,16-MX_CRC_Init-CRC-false-HAL-true,17-MX_RNG_Init-RNG-false-HAL-true,18-MX_TIM2_Init-TIM2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,0-MX_VREFBUF_Init-VREFBUF-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-LL-true,7-MX_USART3_UART_Init-USART3-false-LL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_FDCAN1_Init-FDCAN1-false-HAL-true,13-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,14-MX_FDCAN2_Init-FDCAN2-false-HAL-true,15-MX_I2C1_Init-I2C1-false-HAL-true,16-MX_CRC_Init-CRC-false-HAL-true,17-MX_RNG_Init-RNG-false-HAL-true,18-MX_TIM2_Init-TIM2-false-HAL-true,19-MX_LPTIM4_Init-LPTIM4-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,0-MX_VREFBUF_Init-VREFBUF-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
 RCC.ADCFreq_Value=96000000
 RCC.AHB12Freq_Value=275000000
 RCC.AHB4Freq_Value=275000000
diff --git a/Core/Inc/stm32h7xx_it.h b/Core/Inc/stm32h7xx_it.h
index 874181b..622642b 100644
--- a/Core/Inc/stm32h7xx_it.h
+++ b/Core/Inc/stm32h7xx_it.h
@@ -58,6 +58,8 @@ void DMA1_Stream0_IRQHandler(void);
 void DMA1_Stream1_IRQHandler(void);
 void DMA1_Stream2_IRQHandler(void);
 void DMA1_Stream3_IRQHandler(void);
+void DMA1_Stream4_IRQHandler(void);
+void ADC_IRQHandler(void);
 void FDCAN1_IT0_IRQHandler(void);
 void FDCAN2_IT0_IRQHandler(void);
 void FDCAN1_IT1_IRQHandler(void);
diff --git a/Core/Src/adc.c b/Core/Src/adc.c
index a28e2b4..d91be21 100644
--- a/Core/Src/adc.c
+++ b/Core/Src/adc.c
@@ -25,6 +25,7 @@
 /* USER CODE END 0 */
 
 ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
 
 /* ADC1 init function */
 void MX_ADC1_Init(void)
@@ -50,11 +51,11 @@ void MX_ADC1_Init(void)
   hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
   hadc1.Init.LowPowerAutoWait = DISABLE;
   hadc1.Init.ContinuousConvMode = ENABLE;
-  hadc1.Init.NbrOfConversion = 3;
+  hadc1.Init.NbrOfConversion = 4;
   hadc1.Init.DiscontinuousConvMode = DISABLE;
   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-  hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
+  hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;
   hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
   hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
   hadc1.Init.OversamplingMode = DISABLE;
@@ -73,9 +74,9 @@ void MX_ADC1_Init(void)
 
   /** Configure Regular Channel
   */
-  sConfig.Channel = ADC_CHANNEL_9;
+  sConfig.Channel = ADC_CHANNEL_5;
   sConfig.Rank = ADC_REGULAR_RANK_1;
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  sConfig.SamplingTime = ADC_SAMPLETIME_32CYCLES_5;
   sConfig.SingleDiff = ADC_SINGLE_ENDED;
   sConfig.OffsetNumber = ADC_OFFSET_NONE;
   sConfig.Offset = 0;
@@ -87,7 +88,7 @@ void MX_ADC1_Init(void)
 
   /** Configure Regular Channel
   */
-  sConfig.Channel = ADC_CHANNEL_5;
+  sConfig.Channel = ADC_CHANNEL_8;
   sConfig.Rank = ADC_REGULAR_RANK_2;
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
   {
@@ -96,11 +97,21 @@ void MX_ADC1_Init(void)
 
   /** Configure Regular Channel
   */
+  sConfig.Channel = ADC_CHANNEL_9;
   sConfig.Rank = ADC_REGULAR_RANK_3;
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
   {
     Error_Handler();
   }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_19;
+  sConfig.Rank = ADC_REGULAR_RANK_4;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
   /* USER CODE BEGIN ADC1_Init 2 */
 
   /* USER CODE END ADC1_Init 2 */
@@ -162,6 +173,28 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
     GPIO_InitStruct.Pull = GPIO_NOPULL;
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
+    /* ADC1 DMA Init */
+    /* ADC1 Init */
+    hdma_adc1.Instance = DMA1_Stream4;
+    hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_adc1.Init.Mode = DMA_CIRCULAR;
+    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
+
+    /* ADC1 interrupt Init */
+    HAL_NVIC_SetPriority(ADC_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(ADC_IRQn);
   /* USER CODE BEGIN ADC1_MspInit 1 */
 
   /* USER CODE END ADC1_MspInit 1 */
@@ -191,6 +224,11 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
 
     HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
 
+    /* ADC1 DMA DeInit */
+    HAL_DMA_DeInit(adcHandle->DMA_Handle);
+
+    /* ADC1 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(ADC_IRQn);
   /* USER CODE BEGIN ADC1_MspDeInit 1 */
 
   /* USER CODE END ADC1_MspDeInit 1 */
diff --git a/Core/Src/dma.c b/Core/Src/dma.c
index 60cd15c..91b69ec 100644
--- a/Core/Src/dma.c
+++ b/Core/Src/dma.c
@@ -55,6 +55,9 @@ void MX_DMA_Init(void)
   /* DMA1_Stream3_IRQn interrupt configuration */
   NVIC_SetPriority(DMA1_Stream3_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),5, 0));
   NVIC_EnableIRQ(DMA1_Stream3_IRQn);
+  /* DMA1_Stream4_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
 
 }
 
diff --git a/Core/Src/main.c b/Core/Src/main.c
index aa329d3..090cdee 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -40,6 +40,7 @@
 #include "stdio.h"
 #include "BSP_POWER.h"
 #include "BSP_GPIO.h"
+#include "BSP_ADC.h"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -83,7 +84,7 @@ void ULOG_SendLPUART(ulog_level_t level, char *msg);
   * @retval int
   */
 int main(void)
-  {
+{
   /* USER CODE BEGIN 1 */
 
   /* USER CODE END 1 */
@@ -134,6 +135,7 @@ int main(void)
   
   BSP_GPIO_PeriperalsOn();
   BSP_POWER_Init();
+  BSP_ADC_Start();
   ULOG_INIT();
   ULOG_SUBSCRIBE(ULOG_SendLPUART,ULOG_DEBUG_LEVEL);
   ULOG_DEBUG("Setup Logger");
diff --git a/Core/Src/stm32h7xx_it.c b/Core/Src/stm32h7xx_it.c
index 47cfd0c..7556c93 100644
--- a/Core/Src/stm32h7xx_it.c
+++ b/Core/Src/stm32h7xx_it.c
@@ -56,6 +56,8 @@
 
 /* External variables --------------------------------------------------------*/
 extern PCD_HandleTypeDef hpcd_USB_OTG_HS;
+extern DMA_HandleTypeDef hdma_adc1;
+extern ADC_HandleTypeDef hadc1;
 extern FDCAN_HandleTypeDef hfdcan1;
 extern FDCAN_HandleTypeDef hfdcan2;
 extern LPTIM_HandleTypeDef hlptim4;
@@ -250,6 +252,34 @@ void DMA1_Stream3_IRQHandler(void)
   /* USER CODE END DMA1_Stream3_IRQn 1 */
 }
 
+/**
+  * @brief This function handles DMA1 stream4 global interrupt.
+  */
+void DMA1_Stream4_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
+
+  /* USER CODE END DMA1_Stream4_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_adc1);
+  /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
+
+  /* USER CODE END DMA1_Stream4_IRQn 1 */
+}
+
+/**
+  * @brief This function handles ADC1 and ADC2 global interrupts.
+  */
+void ADC_IRQHandler(void)
+{
+  /* USER CODE BEGIN ADC_IRQn 0 */
+
+  /* USER CODE END ADC_IRQn 0 */
+  HAL_ADC_IRQHandler(&hadc1);
+  /* USER CODE BEGIN ADC_IRQn 1 */
+
+  /* USER CODE END ADC_IRQn 1 */
+}
+
 /**
   * @brief This function handles FDCAN1 interrupt 0.
   */